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authorjc_gargma <jc_gargma@iserlohn-fortress.net>2021-05-09 17:47:57 -0700
committerjc_gargma <jc_gargma@iserlohn-fortress.net>2021-05-09 17:47:57 -0700
commitbcaa976078a3916bf8c54a824a4c7cb3d5bce2fb (patch)
treefa92f79ef4ac3c046c16bb6409c9d4c2bc4df508
parentUpdated to 5.11.19 (diff)
downloadlinux-ck-bcaa976078a3916bf8c54a824a4c7cb3d5bce2fb.tar.xz
Updated to 5.12.2
Diffstat
-rw-r--r--0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch107
-rw-r--r--0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch115
-rw-r--r--0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch167
-rw-r--r--0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch52
-rw-r--r--PKGBUILD26
-rw-r--r--config198
6 files changed, 134 insertions, 531 deletions
diff --git a/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch b/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
deleted file mode 100644
index 8d2f895..0000000
--- a/0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 073097c52c7b85d5d7902994ca3a67817d7aee8d Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 17 Mar 2021 20:48:59 +0200
-Subject: drm/i915/ilk-glk: Fix link training on links with LTTPRs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2
-
-The spec requires to use at least 3.2ms for the AUX timeout period if
-there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming
-spec update makes this more specific, by requiring a 3.2ms minimum
-timeout period for the LTTPR detection reading the 0xF0000-0xF0007
-range (3.6.5.1).
-
-Accordingly disable LTTPR detection until GLK, where the maximum timeout
-we can set is only 1.6ms.
-
-Link training in the non-transparent mode is known to fail at least on
-some SKL systems with a WD19 dock on the link, which exposes an LTTPR
-(see the References below). While this could have different reasons
-besides the too short AUX timeout used, not detecting LTTPRs (and so not
-using the non-transparent LT mode) fixes link training on these systems.
-
-While at it add a code comment about the platform specific maximum
-timeout values.
-
-v2: Add a comment about the g4x maximum timeout as well. (Ville)
-
-Reported-by: Takashi Iwai <tiwai@suse.de>
-Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com>
-Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de>
-References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166
-Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
-Cc: <stable@vger.kernel.org> # v5.11
-Cc: Takashi Iwai <tiwai@suse.de>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com
----
- drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++---
- 2 files changed, 19 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
-index 8a26307c4896..1930df9a8bcc 100644
---- a/drivers/gpu/drm/i915/display/intel_dp.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp.c
-@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
- else
- precharge = 5;
-
-+ /* Max timeout value on G4x-BDW: 1.6ms */
- if (IS_BROADWELL(dev_priv))
- timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
- else
-@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
- enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
- u32 ret;
-
-+ /*
-+ * Max timeout values:
-+ * SKL-GLK: 1.6ms
-+ * CNL: 3.2ms
-+ * ICL+: 4ms
-+ */
- ret = DP_AUX_CH_CTL_SEND_BUSY |
- DP_AUX_CH_CTL_DONE |
- DP_AUX_CH_CTL_INTERRUPT |
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-index d8c6d7054d11..f916b9f04b6b 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
-
- static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
- {
-+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-+
-+ if (intel_dp_is_edp(intel_dp))
-+ return false;
-+
-+ /*
-+ * Detecting LTTPRs must be avoided on platforms with an AUX timeout
-+ * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
-+ */
-+ if (INTEL_GEN(i915) < 10)
-+ return false;
-+
- if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
- intel_dp->lttpr_common_caps) < 0) {
- memset(intel_dp->lttpr_common_caps, 0,
-@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
- bool ret;
- int i;
-
-- if (intel_dp_is_edp(intel_dp))
-- return 0;
--
- ret = intel_dp_read_lttpr_common_caps(intel_dp);
-
- /*
---
-cgit v1.2.3-1-gf6bb5
-
diff --git a/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch b/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
deleted file mode 100644
index 545767e..0000000
--- a/0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 20a122b58cc3df0134c81396a7591397b8f361f2 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Mon, 18 Jan 2021 20:31:43 +0200
-Subject: drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are
- detected
-
-Cherry-picked from 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175
-
-Atm, the driver programs explicitly the default transparent link
-training mode (0x55) to DP_PHY_REPEATER_MODE even if no LTTPRs are
-detected.
-
-This conforms to the spec (3.6.6.1):
-"DP upstream devices that do not enable the Non-transparent mode of
- LTTPRs shall program the PHY_REPEATER_MODE register (DPCD Address
- F0003h) to 55h (default) prior to link training"
-
-however writing the default value to this DPCD register seems to cause
-occasional link training errors at least for a DELL WD19TB TBT dock, when
-no LTTPRs are detected.
-
-Writing to DP_PHY_REPEATER_MODE will also cause an unnecessary timeout
-on systems without any LTTPR.
-
-To fix the above two issues let's assume that setting the default mode
-is redundant when no LTTPRs are detected. Keep the existing behavior and
-program the default mode if more than 8 LTTPRs are detected or in case
-the read from DP_PHY_REPEATER_CNT returns an invalid value.
-
-References: https://gitlab.freedesktop.org/drm/intel/-/issues/2801
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20210118183143.1145707-1-imre.deak@intel.com
----
- .../gpu/drm/i915/display/intel_dp_link_training.c | 36 +++++++++-------------
- 1 file changed, 15 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-index f916b9f04b6b..0359d5936901 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-@@ -34,18 +34,6 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
- link_status[3], link_status[4], link_status[5]);
- }
-
--static int intel_dp_lttpr_count(struct intel_dp *intel_dp)
--{
-- int count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
--
-- /*
-- * Pretend no LTTPRs in case of LTTPR detection error, or
-- * if too many (>8) LTTPRs are detected. This translates to link
-- * training in transparent mode.
-- */
-- return count <= 0 ? 0 : count;
--}
--
- static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
- {
- intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
-@@ -151,6 +139,17 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
- int i;
-
- ret = intel_dp_read_lttpr_common_caps(intel_dp);
-+ if (!ret)
-+ return 0;
-+
-+ lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
-+ /*
-+ * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
-+ * detected as this breaks link training at least on the Dell WD19TB
-+ * dock.
-+ */
-+ if (lttpr_count == 0)
-+ return 0;
-
- /*
- * See DP Standard v2.0 3.6.6.1. about the explicit disabling of
-@@ -159,17 +158,12 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
- */
- intel_dp_set_lttpr_transparent_mode(intel_dp, true);
-
-- if (!ret)
-- return 0;
--
-- lttpr_count = intel_dp_lttpr_count(intel_dp);
--
- /*
- * In case of unsupported number of LTTPRs or failing to switch to
- * non-transparent mode fall-back to transparent link training mode,
- * still taking into account any LTTPR common lane- rate/count limits.
- */
-- if (lttpr_count == 0)
-+ if (lttpr_count < 0)
- return 0;
-
- if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
-@@ -231,11 +225,11 @@ intel_dp_phy_is_downstream_of_source(struct intel_dp *intel_dp,
- enum drm_dp_phy dp_phy)
- {
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-- int lttpr_count = intel_dp_lttpr_count(intel_dp);
-+ int lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
-
-- drm_WARN_ON_ONCE(&i915->drm, lttpr_count == 0 && dp_phy != DP_PHY_DPRX);
-+ drm_WARN_ON_ONCE(&i915->drm, lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);
-
-- return lttpr_count == 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
-+ return lttpr_count <= 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
- }
-
- static u8 intel_dp_phy_voltage_max(struct intel_dp *intel_dp,
---
-cgit v1.2.3-1-gf6bb5
-
diff --git a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch b/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
deleted file mode 100644
index d28bf99..0000000
--- a/0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
+++ /dev/null
@@ -1,167 +0,0 @@
-From 558b94d31689b8c3673d3447888385f60ef99197 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 17 Mar 2021 21:01:49 +0200
-Subject: drm/i915: Disable LTTPR support when the DPCD rev < 1.4
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea
-
-By the specification the 0xF0000-0xF02FF range is only valid when the
-DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so.
-
-Trying to detect LTTPRs returned corrupted values for the above DPCD
-range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD
-revision 1.2 connected.
-
-v2: Add the actual version check.
-v3: Fix s/DRPX/DPRX/ typo.
-
-Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training")
-Cc: <stable@vger.kernel.org> # v5.11
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com
----
- drivers/gpu/drm/i915/display/intel_dp.c | 4 +-
- .../gpu/drm/i915/display/intel_dp_link_training.c | 48 +++++++++++++++++-----
- .../gpu/drm/i915/display/intel_dp_link_training.h | 2 +-
- 3 files changed, 39 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
-index 1930df9a8bcc..bc2aae63fe40 100644
---- a/drivers/gpu/drm/i915/display/intel_dp.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp.c
-@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
- {
- int ret;
-
-- intel_dp_lttpr_init(intel_dp);
--
-- if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd))
-+ if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0)
- return false;
-
- /*
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-index 0359d5936901..e6532ea5757b 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
- link_status[3], link_status[4], link_status[5]);
- }
-
-+static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
-+{
-+ memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
-+}
-+
- static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
- {
- intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
-@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
-
- if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
- intel_dp->lttpr_common_caps) < 0) {
-- memset(intel_dp->lttpr_common_caps, 0,
-- sizeof(intel_dp->lttpr_common_caps));
-+ intel_dp_reset_lttpr_common_caps(intel_dp);
- return false;
- }
-
-@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
- }
-
- /**
-- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode
-+ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode
- * @intel_dp: Intel DP struct
- *
-- * Read the LTTPR common capabilities, switch to non-transparent link training
-- * mode if any is detected and read the PHY capabilities for all detected
-- * LTTPRs. In case of an LTTPR detection error or if the number of
-+ * Read the LTTPR common and DPRX capabilities and switch to non-transparent
-+ * link training mode if any is detected and read the PHY capabilities for all
-+ * detected LTTPRs. In case of an LTTPR detection error or if the number of
- * LTTPRs is more than is supported (8), fall back to the no-LTTPR,
- * transparent mode link training mode.
- *
- * Returns:
-- * >0 if LTTPRs were detected and the non-transparent LT mode was set
-+ * >0 if LTTPRs were detected and the non-transparent LT mode was set. The
-+ * DPRX capabilities are read out.
- * 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a
-- * detection failure and the transparent LT mode was set
-+ * detection failure and the transparent LT mode was set. The DPRX
-+ * capabilities are read out.
-+ * <0 Reading out the DPRX capabilities failed.
- */
--int intel_dp_lttpr_init(struct intel_dp *intel_dp)
-+int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
- {
- int lttpr_count;
- bool ret;
- int i;
-
- ret = intel_dp_read_lttpr_common_caps(intel_dp);
-+
-+ /* The DPTX shall read the DPRX caps after LTTPR detection. */
-+ if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) {
-+ intel_dp_reset_lttpr_common_caps(intel_dp);
-+ return -EIO;
-+ }
-+
- if (!ret)
- return 0;
-
-+ /*
-+ * The 0xF0000-0xF02FF range is only valid if the DPCD revision is
-+ * at least 1.4.
-+ */
-+ if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) {
-+ intel_dp_reset_lttpr_common_caps(intel_dp);
-+ return 0;
-+ }
-+
- lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
- /*
- * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
-@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
-
- return lttpr_count;
- }
--EXPORT_SYMBOL(intel_dp_lttpr_init);
-+EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps);
-
- static u8 dp_voltage_max(u8 preemph)
- {
-@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
- * TODO: Reiniting LTTPRs here won't be needed once proper connector
- * HW state readout is added.
- */
-- int lttpr_count = intel_dp_lttpr_init(intel_dp);
-+ int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
-+
-+ if (lttpr_count < 0)
-+ return;
-
- if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
- intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
-index 6a1f76bd8c75..9cb7c28027f0 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
-+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
-@@ -11,7 +11,7 @@
- struct intel_crtc_state;
- struct intel_dp;
-
--int intel_dp_lttpr_init(struct intel_dp *intel_dp);
-+int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
-
- void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
---
-cgit v1.2.3-1-gf6bb5
-
diff --git a/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch b/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
deleted file mode 100644
index 8e1cc1d..0000000
--- a/0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 702d986d2a3b347a2d732a3fbfc9838dc70a2be7 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Tue, 13 Apr 2021 02:24:12 +0300
-Subject: drm/i915: Fix modesetting in case of unexpected AUX timeouts
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-In case AUX failures happen unexpectedly during a modeset, the driver
-should still complete the modeset. In particular the driver should
-perform the link training sequence steps even in case of an AUX failure,
-as this sequence also includes port initialization steps. Not doing that
-can leave the port/pipe in a broken state and lead for instance to a
-flip done timeout.
-
-Fix this by continuing with link training (in a no-LTTPR mode) if the
-DPRX DPCD readout failed for some reason at the beginning of link
-training. After a successful connector detection we already have the
-DPCD read out and cached, so the failed repeated read for it should not
-cause a problem. Note that a partial AUX read could in theory partly
-overwrite the cached DPCD (and return error) but this overwrite should
-not happen if the returned values are corrupted (due to a timeout or
-some other IO error).
-
-Kudos to Ville to root cause the problem.
-
-Fixes: 7dffbdedb96a ("drm/i915: Disable LTTPR support when the DPCD rev < 1.4")
-References: https://gitlab.freedesktop.org/drm/intel/-/issues/3308
-Cc: stable@vger.kernel.org # 5.11
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Imre Deak <imre.deak@intel.com>
----
- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-index e6532ea5757b..6f2cb9d55e1b 100644
---- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
-@@ -843,7 +843,8 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
- int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
-
- if (lttpr_count < 0)
-- return;
-+ /* Still continue with enabling the port and link training. */
-+ lttpr_count = 0;
-
- if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
- intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
---
-cgit v1.2.3-1-gf6bb5
-
diff --git a/PKGBUILD b/PKGBUILD
index 45b06b5..f2911be 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -22,9 +22,9 @@ _custom=1
pkgbase=linux-ck
_supver=5
-_majver=11
-_minver=19
-_gccpatchver='20210402'
+_majver=12
+_minver=2
+_gccpatchver='20210412'
_gccpatchger='10'
_gccpatchker='5.8'
_ckpatchversion=ck1
@@ -51,10 +51,6 @@ source=(
config # the main kernel config file
linux-ck-patch-${_supver}.${_majver}-${_ckpatchversion}.xz::http://ck.kolivas.org/patches/${_supver}.0/${_supver}.${_majver}/${_supver}.${_majver}-${_ckpatchversion}/patch-${_supver}.${_majver}-${_ckpatchversion}.xz
0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
- 0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
- 0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
- 0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
- 0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
kernel_gcc_patch-${_gccpatchver}.tar.gz::https://github.com/graysky2/kernel_gcc_patch/archive/${_gccpatchver}.tar.gz
ath9k-regdom-hack.patch
raid6-default-algo.patch
@@ -64,16 +60,12 @@ validpgpkeys=(
'647F28654894E3BD457199BE38DBBDC86092693E' # Greg Kroah-Hartman
)
# https://www.kernel.org/pub/linux/kernel/v5.x/sha256sums.asc
-b2sums=('c5d805c8eb16922e0e7c675406cadfc5414126973599db5c07aae02661eefee237219735eff8b459c0e07fdd5f54962d03a6c80ef9bf730d6a68c8286fd713b0'
+b2sums=('43d449d3099471c5d3baf6cae8f432fd5f9d39e24b4efc908b04cbfad1ed5c63e5197394c78100e47bd786c92b530dd475fd6098152144a36a8dd0c50a0b3f33'
'SKIP'
- 'd50fb0db99418bdea1a7da30cd2ce279f1e91d80e4d438fe584fece2a4a9e2bf7bf3e821c3a13fe53454d0b9b78378af591f8628e1e5e95c83afd8b15be2d3fd'
- '81d948aef4423255ebb4fa9b12c96207af8d14e225cf95d631dfbb1c0e88d31f60f81c2aff63046a78d8daf2601270ebb1d9cfaeccc3e3fdb08dbc430b53aff5'
+ '1dcdae744c69a4118bb0434a31dfa98c6a77be6e422a52822c936c93bf32cf593724f517e4bd183fd194c3456795e001ce336dea463148bb875656d60e39142e'
+ 'c9f729ba1efe6f04e7b2c57d3999bc9675b577596dccb2f227e5b6e444285e1fdd270bf67c0fcf9f5808a4c3a4b1c7a5c13a76f754ad9b9447243ccbaf2ce6a3'
'2f9195675270d79d735a3aaec25887c2f80b76eae98be8fcc5fd59ab71d925c5ee20ec5e2a015deb68b61bc2cc7f56f546a22cb96ee038e2e24c2c9dd5c3f79f'
- '3ef315b3da8aa66e839ca7a52d1ccfcff033c7743e83aa7cc28be9ff2c557a5454a1da1acedd1c19d1731367bd0bd2646db34251d86a3f40548bccf2829f0a79'
- '377c92be17d7adba145d0ffebd5c3e48171559d73f0112a2f66374a19819ec488ae2d5af70ae82ff945e4469e4d4e9cb690b671b7c07ba19e41d5f28f581a54b'
- 'd72dffddefb2eaa7867622fa34a05f342ea1ebba121207ff1046008b102b35370dd825337c22d18ccaf8d03e8c933084b09153b70fe212b041fd850f80989957'
- '8277ecc477384fec1414f4ea5c091495ade7313076fcde835ad02bd117f19ddea0df55b52f3d95277735fe095b56dd4a7aceefbfd8ac8b3c1049c908d0612b84'
- 'b8c3ba685a7fa34f8b047467a41e2e78702c41e54469934515c7d2f221411b2357a7378b86edaf2ca7ce1a3f9b627878438ab1cfcdae4fc681f47021d9a813d9'
+ '72194a32a06c43809d1272bd675890b6d27c6c54353150a366e8e2c50ad6eca6ee23c5d6281822965a228cfedfa07a60fe135d1b4f539e4a62728d4460cc0b0e'
'b6ef77035611139fa9a6d5b8d30570e2781bb4da483bb569884b0bd0129b62e0b82a5a6776fefe43fee801c70d39de1ea4d4c177f7cedd5ac135e3c64f7b895a'
'fde132f3705d908e6f2147c78a2193289916d72304ca5efa2229d79fc3e57a857314ce94e71425caef2f7f7b6cf87f05ef86335dc8bd4be78e7035afe608005a')
@@ -94,10 +86,6 @@ prepare() {
# Hotfixes
echo "Applying hotfixes"
patch -p1 -i ../0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
- patch -p1 -i ../0002-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTTPRs.patch
- patch -p1 -i ../0003-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-LTTPRs-are-detected.patch
- patch -p1 -i ../0004-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-less-than-1.4.patch
- patch -p1 -i ../0005-drm-i915-Fix-modesetting-in-case-of-unexpected-AUX-timeouts.patch
# ck patch
diff --git a/config b/config
index 4622e45..b4a3f21 100644
--- a/config
+++ b/config
@@ -1,12 +1,13 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.11.13 Kernel Configuration
+# Linux/x86 5.12.2 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=100200
-CONFIG_LD_VERSION=236010000
CONFIG_CLANG_VERSION=0
+CONFIG_LD_IS_BFD=y
+CONFIG_LD_VERSION=23601
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
@@ -104,6 +105,7 @@ CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_PREEMPTION=y
+CONFIG_PREEMPT_DYNAMIC=y
#
# CPU/Task time and stats accounting
@@ -436,7 +438,6 @@ CONFIG_X86_MCE_INTEL=y
CONFIG_X86_MCE_AMD=y
CONFIG_X86_MCE_THRESHOLD=y
CONFIG_X86_MCE_INJECT=m
-CONFIG_X86_THERMAL_VECTOR=y
#
# Performance monitoring
@@ -570,6 +571,7 @@ CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y
CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y
# CONFIG_ACPI_DEBUGGER is not set
CONFIG_ACPI_SPCR_TABLE=y
+CONFIG_ACPI_FPDT=y
CONFIG_ACPI_LPIT=y
CONFIG_ACPI_SLEEP=y
CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y
@@ -590,6 +592,7 @@ CONFIG_ACPI_IPMI=m
CONFIG_ACPI_HOTPLUG_CPU=y
CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
CONFIG_ACPI_THERMAL=y
+CONFIG_ACPI_PLATFORM_PROFILE=m
CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
CONFIG_ACPI_TABLE_UPGRADE=y
CONFIG_ACPI_DEBUG=y
@@ -629,7 +632,6 @@ CONFIG_CHT_WC_PMIC_OPREGION=y
CONFIG_CHT_DC_TI_PMIC_OPREGION=y
CONFIG_TPS68470_PMIC_OPREGION=y
CONFIG_X86_PM_TIMER=y
-# CONFIG_SFI is not set
#
# CPU Frequency scaling
@@ -781,6 +783,7 @@ CONFIG_KVM=m
CONFIG_KVM_INTEL=m
CONFIG_KVM_AMD=m
# CONFIG_KVM_AMD_SEV is not set
+CONFIG_KVM_XEN=y
CONFIG_KVM_MMU_AUDIT=y
CONFIG_AS_AVX512=y
CONFIG_AS_SHA1_NI=y
@@ -794,10 +797,6 @@ CONFIG_CRASH_CORE=y
CONFIG_KEXEC_CORE=y
CONFIG_HOTPLUG_SMT=y
CONFIG_GENERIC_ENTRY=y
-CONFIG_OPROFILE=m
-# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
-CONFIG_HAVE_OPROFILE=y
-CONFIG_OPROFILE_NMI_TIMER=y
CONFIG_KPROBES=y
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
@@ -854,6 +853,9 @@ CONFIG_HAVE_ARCH_STACKLEAK=y
CONFIG_HAVE_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR_STRONG=y
+CONFIG_ARCH_SUPPORTS_LTO_CLANG=y
+CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y
+CONFIG_LTO_NONE=y
CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_CONTEXT_TRACKING_OFFSTACK=y
@@ -868,6 +870,8 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_HAVE_ARCH_SOFT_DIRTY=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
@@ -893,8 +897,10 @@ CONFIG_LOCK_EVENT_COUNTS=y
CONFIG_ARCH_HAS_MEM_ENCRYPT=y
CONFIG_HAVE_STATIC_CALL=y
CONFIG_HAVE_STATIC_CALL_INLINE=y
+CONFIG_HAVE_PREEMPT_DYNAMIC=y
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_HAS_ELFCORE_COMPAT=y
#
# GCOV-based kernel profiling
@@ -931,7 +937,6 @@ CONFIG_MODULE_COMPRESS=y
# CONFIG_MODULE_COMPRESS_GZIP is not set
CONFIG_MODULE_COMPRESS_XZ=y
CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y
-CONFIG_UNUSED_SYMBOLS=y
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_BLK_RQ_ALLOC_TIME=y
@@ -1099,7 +1104,6 @@ CONFIG_DEV_PAGEMAP_OPS=y
CONFIG_HMM_MIRROR=y
CONFIG_DEVICE_PRIVATE=y
CONFIG_VMAP_PFN=y
-CONFIG_FRAME_VECTOR=y
CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
CONFIG_ARCH_HAS_PKEYS=y
# CONFIG_PERCPU_STATS is not set
@@ -1470,6 +1474,7 @@ CONFIG_IP_VS_SH=m
CONFIG_IP_VS_MH=m
CONFIG_IP_VS_SED=m
CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_TWOS=m
#
# IPVS SH scheduler
@@ -1648,10 +1653,12 @@ CONFIG_NET_DSA_TAG_MTK=m
CONFIG_NET_DSA_TAG_KSZ=m
CONFIG_NET_DSA_TAG_RTL4_A=m
CONFIG_NET_DSA_TAG_OCELOT=m
+CONFIG_NET_DSA_TAG_OCELOT_8021Q=m
CONFIG_NET_DSA_TAG_QCA=m
CONFIG_NET_DSA_TAG_LAN9303=m
CONFIG_NET_DSA_TAG_SJA1105=m
CONFIG_NET_DSA_TAG_TRAILER=m
+CONFIG_NET_DSA_TAG_XRS700X=m
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
@@ -1825,6 +1832,7 @@ CONFIG_NET_NCSI=y
CONFIG_NCSI_OEM_CMD_GET_MAC=y
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
+CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_XPS=y
CONFIG_CGROUP_NET_PRIO=y
CONFIG_CGROUP_NET_CLASSID=y
@@ -2059,6 +2067,7 @@ CONFIG_NFC_TRF7970A=m
# CONFIG_NFC_MEI_PHY is not set
CONFIG_NFC_SIM=m
CONFIG_NFC_PORT100=m
+CONFIG_NFC_VIRTUAL_NCI=m
CONFIG_NFC_FDP=m
CONFIG_NFC_FDP_I2C=m
CONFIG_NFC_PN544=m
@@ -2188,6 +2197,9 @@ CONFIG_PCI_MESON=y
CONFIG_PCI_SW_SWITCHTEC=m
# end of PCI switch controller drivers
+CONFIG_CXL_BUS=m
+CONFIG_CXL_MEM=m
+# CONFIG_CXL_MEM_RAW_COMMANDS is not set
CONFIG_PCCARD=m
CONFIG_PCMCIA=m
CONFIG_PCMCIA_LOAD_CIS=y
@@ -2367,8 +2379,9 @@ CONFIG_MTD_NAND_NANDSIM=m
# ECC engine support
#
CONFIG_MTD_NAND_ECC=y
-# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set
-# CONFIG_MTD_NAND_ECC_SW_BCH is not set
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y
+CONFIG_MTD_NAND_ECC_SW_BCH=y
# end of ECC engine support
# end of NAND
@@ -2427,7 +2440,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_DRBD=m
# CONFIG_DRBD_FAULT_INJECTION is not set
CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_SKD=m
CONFIG_BLK_DEV_SX8=m
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_COUNT=16
@@ -2531,6 +2543,8 @@ CONFIG_ALTERA_STAPL=m
CONFIG_GENWQE=m
CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0
CONFIG_ECHO=m
+CONFIG_BCM_VK=m
+CONFIG_BCM_VK_TTY=y
CONFIG_MISC_ALCOR_PCI=m
CONFIG_MISC_RTSX_PCI=m
CONFIG_MISC_RTSX_USB=m
@@ -2648,7 +2662,6 @@ CONFIG_SCSI_SNIC=m
CONFIG_SCSI_DMX3191D=m
CONFIG_SCSI_FDOMAIN=m
CONFIG_SCSI_FDOMAIN_PCI=m
-CONFIG_SCSI_GDTH=m
CONFIG_SCSI_ISCI=m
CONFIG_SCSI_IPS=m
CONFIG_SCSI_INITIO=m
@@ -2974,7 +2987,6 @@ CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI=m
CONFIG_NET_DSA_MICROCHIP_KSZ8795=m
CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
CONFIG_NET_DSA_MV88E6XXX=m
-CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
CONFIG_NET_DSA_MV88E6XXX_PTP=y
CONFIG_NET_DSA_MSCC_SEVILLE=m
CONFIG_NET_DSA_AR9331=m
@@ -2982,6 +2994,9 @@ CONFIG_NET_DSA_SJA1105=m
CONFIG_NET_DSA_SJA1105_PTP=y
CONFIG_NET_DSA_SJA1105_TAS=y
CONFIG_NET_DSA_SJA1105_VL=y
+CONFIG_NET_DSA_XRS700X=m
+CONFIG_NET_DSA_XRS700X_I2C=m
+CONFIG_NET_DSA_XRS700X_MDIO=m
CONFIG_NET_DSA_QCA8K=m
CONFIG_NET_DSA_REALTEK_SMI=m
CONFIG_NET_DSA_SMSC_LAN9303=m
@@ -3027,8 +3042,6 @@ CONFIG_ATL1=m
CONFIG_ATL1E=m
CONFIG_ATL1C=m
CONFIG_ALX=m
-CONFIG_NET_VENDOR_AURORA=y
-CONFIG_AURORA_NB8800=m
CONFIG_NET_VENDOR_BROADCOM=y
CONFIG_B44=m
CONFIG_B44_PCI_AUTOSELECT=y
@@ -3170,6 +3183,8 @@ CONFIG_MLX5_FPGA_TLS=y
CONFIG_MLX5_TLS=y
CONFIG_MLX5_EN_TLS=y
CONFIG_MLX5_SW_STEERING=y
+CONFIG_MLX5_SF=y
+CONFIG_MLX5_SF_MANAGER=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE_THERMAL=y
@@ -3310,6 +3325,7 @@ CONFIG_WIZNET_W5300=m
CONFIG_WIZNET_BUS_ANY=y
CONFIG_WIZNET_W5100_SPI=m
CONFIG_NET_VENDOR_XILINX=y
+CONFIG_XILINX_EMACLITE=m
CONFIG_XILINX_AXI_EMAC=m
CONFIG_XILINX_LL_TEMAC=m
CONFIG_NET_VENDOR_XIRCOM=y
@@ -3655,6 +3671,7 @@ CONFIG_MT76_USB=m
CONFIG_MT76_SDIO=m
CONFIG_MT76x02_LIB=m
CONFIG_MT76x02_USB=m
+CONFIG_MT76_CONNAC_LIB=m
CONFIG_MT76x0_COMMON=m
CONFIG_MT76x0U=m
CONFIG_MT76x0E=m
@@ -3668,6 +3685,7 @@ CONFIG_MT7663_USB_SDIO_COMMON=m
CONFIG_MT7663U=m
CONFIG_MT7663S=m
CONFIG_MT7915E=m
+CONFIG_MT7921E=m
CONFIG_WLAN_VENDOR_MICROCHIP=y
CONFIG_WILC1000=m
CONFIG_WILC1000_SDIO=m
@@ -4210,7 +4228,6 @@ CONFIG_SERIAL_ALTERA_JTAGUART=m
CONFIG_SERIAL_ALTERA_UART=m
CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4
CONFIG_SERIAL_ALTERA_UART_BAUDRATE=115200
-CONFIG_SERIAL_IFX6X60=m
CONFIG_SERIAL_ARC=m
CONFIG_SERIAL_ARC_NR_PORTS=1
CONFIG_SERIAL_RP2=m
@@ -4292,6 +4309,7 @@ CONFIG_TCG_TIS_CORE=m
CONFIG_TCG_TIS=m
CONFIG_TCG_TIS_SPI=m
CONFIG_TCG_TIS_SPI_CR50=y
+CONFIG_TCG_TIS_I2C_CR50=m
CONFIG_TCG_TIS_I2C_ATMEL=m
CONFIG_TCG_TIS_I2C_INFINEON=m
CONFIG_TCG_TIS_I2C_NUVOTON=m
@@ -4559,7 +4577,6 @@ CONFIG_GPIO_MB86S7X=m
CONFIG_GPIO_MENZ127=m
CONFIG_GPIO_SIOX=m
CONFIG_GPIO_VX855=m
-CONFIG_GPIO_XILINX=m
CONFIG_GPIO_AMD_FCH=m
# end of Memory mapped GPIO drivers
@@ -4602,7 +4619,6 @@ CONFIG_GPIO_KEMPLD=m
CONFIG_GPIO_LP3943=m
CONFIG_GPIO_LP873X=m
CONFIG_GPIO_MADERA=m
-CONFIG_GPIO_MSIC=y
CONFIG_GPIO_PALMAS=y
CONFIG_GPIO_RC5T583=y
CONFIG_GPIO_TPS65086=m
@@ -4742,6 +4758,7 @@ CONFIG_CHARGER_LP8788=m
CONFIG_CHARGER_GPIO=m
CONFIG_CHARGER_MANAGER=y
CONFIG_CHARGER_LT3651=m
+CONFIG_CHARGER_LTC4162L=m
CONFIG_CHARGER_MAX14577=m
CONFIG_CHARGER_MAX77693=m
CONFIG_CHARGER_MAX8997=m
@@ -4754,6 +4771,7 @@ CONFIG_CHARGER_BQ24735=m
CONFIG_CHARGER_BQ2515X=m
CONFIG_CHARGER_BQ25890=m
CONFIG_CHARGER_BQ25980=m
+CONFIG_CHARGER_BQ256XX=m
CONFIG_CHARGER_SMB347=m
CONFIG_CHARGER_TPS65090=m
CONFIG_BATTERY_GAUGE_LTC2941=m
@@ -4788,6 +4806,7 @@ CONFIG_SENSORS_ADT7411=m
CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m
+CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_AXI_FAN_CONTROL=m
@@ -4857,6 +4876,7 @@ CONFIG_SENSORS_MAX31790=m
CONFIG_SENSORS_MCP3021=m
CONFIG_SENSORS_MLXREG_FAN=m
CONFIG_SENSORS_TC654=m
+CONFIG_SENSORS_TPS23861=m
CONFIG_SENSORS_MENF21BMC_HWMON=m
CONFIG_SENSORS_MR75203=m
CONFIG_SENSORS_ADCXX=m
@@ -4997,6 +5017,7 @@ CONFIG_DEVFREQ_THERMAL=y
# Intel thermal drivers
#
CONFIG_INTEL_POWERCLAMP=m
+CONFIG_X86_THERMAL_VECTOR=y
CONFIG_X86_PKG_TEMP_THERMAL=m
CONFIG_INTEL_SOC_DTS_IOSF_CORE=m
CONFIG_INTEL_SOC_DTS_THERMAL=m
@@ -5177,7 +5198,6 @@ CONFIG_INTEL_SOC_PMIC_MRFLD=m
CONFIG_MFD_INTEL_LPSS=m
CONFIG_MFD_INTEL_LPSS_ACPI=m
CONFIG_MFD_INTEL_LPSS_PCI=m
-CONFIG_MFD_INTEL_MSIC=y
CONFIG_MFD_INTEL_PMC_BXT=m
CONFIG_MFD_INTEL_PMT=m
CONFIG_MFD_IQS62X=m
@@ -5271,7 +5291,6 @@ CONFIG_REGULATOR_88PM8607=m
CONFIG_REGULATOR_ACT8865=m
CONFIG_REGULATOR_AD5398=m
CONFIG_REGULATOR_AAT2870=m
-CONFIG_REGULATOR_AB3100=m
CONFIG_REGULATOR_ARIZONA_LDO1=m
CONFIG_REGULATOR_ARIZONA_MICSUPP=m
CONFIG_REGULATOR_AS3711=m
@@ -5665,7 +5684,6 @@ CONFIG_VIDEO_CX88_ENABLE_VP3054=y
CONFIG_VIDEO_CX88_VP3054=m
CONFIG_VIDEO_CX88_MPEG=m
CONFIG_VIDEO_BT848=m
-# CONFIG_GPIO_BT8XX is not set
CONFIG_DVB_BT8XX=m
CONFIG_VIDEO_SAA7134=m
CONFIG_VIDEO_SAA7134_ALSA=m
@@ -5700,6 +5718,7 @@ CONFIG_DVB_DDBRIDGE=m
CONFIG_DVB_SMIPCIE=m
CONFIG_DVB_NETUP_UNIDVB=m
CONFIG_VIDEO_IPU3_CIO2=m
+CONFIG_CIO2_BRIDGE=y
CONFIG_RADIO_ADAPTERS=y
CONFIG_RADIO_TEA575X=m
CONFIG_RADIO_SI470X=m
@@ -5843,6 +5862,7 @@ CONFIG_VIDEO_OV2680=m
CONFIG_VIDEO_OV2685=m
CONFIG_VIDEO_OV2740=m
CONFIG_VIDEO_OV5647=m
+CONFIG_VIDEO_OV5648=m
CONFIG_VIDEO_OV6650=m
CONFIG_VIDEO_OV5670=m
CONFIG_VIDEO_OV5675=m
@@ -5853,6 +5873,7 @@ CONFIG_VIDEO_OV7640=m
CONFIG_VIDEO_OV7670=m
CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV8856=m
+CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9640=m
CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_OV9734=m
@@ -5870,7 +5891,9 @@ CONFIG_VIDEO_MT9V111=m
CONFIG_VIDEO_SR030PC30=m
CONFIG_VIDEO_NOON010PC30=m
CONFIG_VIDEO_M5MOLS=m
+CONFIG_VIDEO_MAX9271_LIB=m
CONFIG_VIDEO_RDACM20=m
+CONFIG_VIDEO_RDACM21=m
CONFIG_VIDEO_RJ54N1=m
CONFIG_VIDEO_S5K6AA=m
CONFIG_VIDEO_S5K6A3=m
@@ -6061,6 +6084,7 @@ CONFIG_DVB_AU8522=m
CONFIG_DVB_AU8522_DTV=m
CONFIG_DVB_AU8522_V4L=m
CONFIG_DVB_S5H1411=m
+CONFIG_DVB_MXL692=m
#
# ISDB-T (terrestrial) frontends
@@ -6211,7 +6235,6 @@ CONFIG_DRM_VMWGFX=m
CONFIG_DRM_VMWGFX_FBCON=y
CONFIG_DRM_GMA500=m
CONFIG_DRM_GMA600=y
-CONFIG_DRM_GMA3600=y
CONFIG_DRM_UDL=m
CONFIG_DRM_AST=m
CONFIG_DRM_MGAG200=m
@@ -6421,6 +6444,7 @@ CONFIG_SND_DEBUG=y
# CONFIG_SND_DEBUG_VERBOSE is not set
# CONFIG_SND_PCM_XRUN_DEBUG is not set
# CONFIG_SND_CTL_VALIDATION is not set
+# CONFIG_SND_JACK_INJECTION_DEBUG is not set
CONFIG_SND_VMASTER=y
CONFIG_SND_DMA_SGBUF=y
CONFIG_SND_SEQUENCER=m
@@ -6559,6 +6583,8 @@ CONFIG_SND_HDA_EXT_CORE=m
CONFIG_SND_HDA_PREALLOC_SIZE=4096
CONFIG_SND_INTEL_NHLT=y
CONFIG_SND_INTEL_DSP_CONFIG=m
+CONFIG_SND_INTEL_SOUNDWIRE_ACPI=m
+CONFIG_SND_INTEL_BYT_PREFER_SOF=y
CONFIG_SND_SPI=y
CONFIG_SND_USB=y
CONFIG_SND_USB_AUDIO=m
@@ -6665,6 +6691,7 @@ CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_WM5102_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
@@ -6698,42 +6725,33 @@ CONFIG_SND_SOC_INTEL_EHL_RT5660_MACH=m
CONFIG_SND_SOC_INTEL_SOUNDWIRE_SOF_MACH=m
CONFIG_SND_SOC_MTK_BTCVSD=m
CONFIG_SND_SOC_SOF_TOPLEVEL=y
+CONFIG_SND_SOC_SOF_PCI_DEV=m
CONFIG_SND_SOC_SOF_PCI=m
CONFIG_SND_SOC_SOF_ACPI=m
+CONFIG_SND_SOC_SOF_ACPI_DEV=m
# CONFIG_SND_SOC_SOF_DEBUG_PROBES is not set
CONFIG_SND_SOC_SOF=m
CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE=y
CONFIG_SND_SOC_SOF_INTEL_TOPLEVEL=y
-CONFIG_SND_SOC_SOF_INTEL_ACPI=m
-CONFIG_SND_SOC_SOF_INTEL_PCI=m
CONFIG_SND_SOC_SOF_INTEL_HIFI_EP_IPC=m
CONFIG_SND_SOC_SOF_INTEL_ATOM_HIFI_EP=m
CONFIG_SND_SOC_SOF_INTEL_COMMON=m
-CONFIG_SND_SOC_SOF_BAYTRAIL_SUPPORT=y
CONFIG_SND_SOC_SOF_BAYTRAIL=m
-# CONFIG_SND_SOC_SOF_BROADWELL_SUPPORT is not set
-CONFIG_SND_SOC_SOF_MERRIFIELD_SUPPORT=y
+# CONFIG_SND_SOC_SOF_BROADWELL is not set
CONFIG_SND_SOC_SOF_MERRIFIELD=m
-CONFIG_SND_SOC_SOF_APOLLOLAKE_SUPPORT=y
+CONFIG_SND_SOC_SOF_INTEL_APL=m
CONFIG_SND_SOC_SOF_APOLLOLAKE=m
-CONFIG_SND_SOC_SOF_GEMINILAKE_SUPPORT=y
CONFIG_SND_SOC_SOF_GEMINILAKE=m
-CONFIG_SND_SOC_SOF_CANNONLAKE_SUPPORT=y
+CONFIG_SND_SOC_SOF_INTEL_CNL=m
CONFIG_SND_SOC_SOF_CANNONLAKE=m
-CONFIG_SND_SOC_SOF_COFFEELAKE_SUPPORT=y
CONFIG_SND_SOC_SOF_COFFEELAKE=m
-CONFIG_SND_SOC_SOF_ICELAKE_SUPPORT=y
-CONFIG_SND_SOC_SOF_ICELAKE=m
CONFIG_SND_SOC_SOF_COMETLAKE=m
-CONFIG_SND_SOC_SOF_COMETLAKE_SUPPORT=y
-CONFIG_SND_SOC_SOF_COMETLAKE_LP_SUPPORT=y
-CONFIG_SND_SOC_SOF_TIGERLAKE_SUPPORT=y
+CONFIG_SND_SOC_SOF_INTEL_ICL=m
+CONFIG_SND_SOC_SOF_ICELAKE=m
+CONFIG_SND_SOC_SOF_JASPERLAKE=m
+CONFIG_SND_SOC_SOF_INTEL_TGL=m
CONFIG_SND_SOC_SOF_TIGERLAKE=m
-CONFIG_SND_SOC_SOF_ELKHARTLAKE_SUPPORT=y
CONFIG_SND_SOC_SOF_ELKHARTLAKE=m
-CONFIG_SND_SOC_SOF_JASPERLAKE_SUPPORT=y
-CONFIG_SND_SOC_SOF_JASPERLAKE=m
-CONFIG_SND_SOC_SOF_ALDERLAKE_SUPPORT=y
CONFIG_SND_SOC_SOF_ALDERLAKE=m
CONFIG_SND_SOC_SOF_HDA_COMMON=m
CONFIG_SND_SOC_SOF_HDA_LINK=y
@@ -6741,7 +6759,6 @@ CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC=y
# CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1 is not set
CONFIG_SND_SOC_SOF_HDA_LINK_BASELINE=m
CONFIG_SND_SOC_SOF_HDA=m
-CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK=y
CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=m
CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=m
CONFIG_SND_SOC_SOF_XTENSA=m
@@ -6755,12 +6772,13 @@ CONFIG_SND_SOC_XILINX_I2S=m
CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m
CONFIG_SND_SOC_XILINX_SPDIF=m
CONFIG_SND_SOC_XTFPGA_I2S=m
-CONFIG_ZX_TDM=m
CONFIG_SND_SOC_I2C_AND_SPI=m
#
# CODEC drivers
#
+CONFIG_SND_SOC_ARIZONA=m
+CONFIG_SND_SOC_WM_ADSP=m
CONFIG_SND_SOC_AC97_CODEC=m
CONFIG_SND_SOC_ADAU_UTILS=m
CONFIG_SND_SOC_ADAU1372=m
@@ -6872,6 +6890,7 @@ CONFIG_SND_SOC_RT5631=m
CONFIG_SND_SOC_RT5640=m
CONFIG_SND_SOC_RT5645=m
CONFIG_SND_SOC_RT5651=m
+CONFIG_SND_SOC_RT5659=m
CONFIG_SND_SOC_RT5660=m
CONFIG_SND_SOC_RT5663=m
CONFIG_SND_SOC_RT5670=m
@@ -6893,7 +6912,6 @@ CONFIG_SND_SOC_SIGMADSP_I2C=m
CONFIG_SND_SOC_SIGMADSP_REGMAP=m
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
CONFIG_SND_SOC_SIMPLE_MUX=m
-CONFIG_SND_SOC_SIRF_AUDIO_CODEC=m
CONFIG_SND_SOC_SPDIF=m
CONFIG_SND_SOC_SSM2305=m
CONFIG_SND_SOC_SSM2602=m
@@ -6928,6 +6946,7 @@ CONFIG_SND_SOC_TSCS454=m
CONFIG_SND_SOC_UDA1334=m
CONFIG_SND_SOC_WCD9335=m
CONFIG_SND_SOC_WCD934X=m
+CONFIG_SND_SOC_WM5102=m
CONFIG_SND_SOC_WM8510=m
CONFIG_SND_SOC_WM8523=m
CONFIG_SND_SOC_WM8524=m
@@ -6968,6 +6987,8 @@ CONFIG_SND_SOC_NAU8825=m
CONFIG_SND_SOC_TPA6130A2=m
CONFIG_SND_SOC_LPASS_WSA_MACRO=m
CONFIG_SND_SOC_LPASS_VA_MACRO=m
+CONFIG_SND_SOC_LPASS_RX_MACRO=m
+CONFIG_SND_SOC_LPASS_TX_MACRO=m
# end of CODEC drivers
CONFIG_SND_SIMPLE_CARD_UTILS=m
@@ -7068,6 +7089,8 @@ CONFIG_HID_PICOLCD_LCD=y
CONFIG_HID_PICOLCD_LEDS=y
CONFIG_HID_PICOLCD_CIR=y
CONFIG_HID_PLANTRONICS=m
+CONFIG_HID_PLAYSTATION=m
+CONFIG_PLAYSTATION_FF=y
CONFIG_HID_PRIMAX=m
CONFIG_HID_RETRODE=m
CONFIG_HID_ROCCAT=m
@@ -7115,9 +7138,11 @@ CONFIG_USB_HIDDEV=y
#
# I2C HID support
#
-CONFIG_I2C_HID=m
+CONFIG_I2C_HID_ACPI=m
# end of I2C HID support
+CONFIG_I2C_HID_CORE=m
+
#
# Intel ISH HID support
#
@@ -7232,10 +7257,15 @@ CONFIG_USBIP_VHCI_NR_HCS=1
CONFIG_USBIP_HOST=m
CONFIG_USBIP_VUDC=m
# CONFIG_USBIP_DEBUG is not set
+CONFIG_USB_CDNS_SUPPORT=m
+CONFIG_USB_CDNS_HOST=y
CONFIG_USB_CDNS3=m
CONFIG_USB_CDNS3_GADGET=y
CONFIG_USB_CDNS3_HOST=y
CONFIG_USB_CDNS3_PCI_WRAP=m
+CONFIG_USB_CDNSP_PCI=m
+CONFIG_USB_CDNSP_GADGET=y
+CONFIG_USB_CDNSP_HOST=y
CONFIG_USB_MUSB_HDRC=m
# CONFIG_USB_MUSB_HOST is not set
# CONFIG_USB_MUSB_GADGET is not set
@@ -7343,6 +7373,7 @@ CONFIG_USB_SERIAL_WISHBONE=m
CONFIG_USB_SERIAL_SSU100=m
CONFIG_USB_SERIAL_QT2=m
CONFIG_USB_SERIAL_UPD78F0730=m
+CONFIG_USB_SERIAL_XR=m
CONFIG_USB_SERIAL_DEBUG=m
#
@@ -7390,6 +7421,7 @@ CONFIG_TAHVO_USB=m
# CONFIG_TAHVO_USB_HOST_BY_DEFAULT is not set
CONFIG_USB_ISP1301=m
# end of USB Physical Layer drivers
+
CONFIG_USB_GADGET=m
# CONFIG_USB_GADGET_DEBUG is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -7410,10 +7442,6 @@ CONFIG_USB_MV_U3D=m
CONFIG_USB_SNP_CORE=m
CONFIG_USB_M66592=m
CONFIG_USB_BDC_UDC=m
-
-#
-# Platform Support
-#
CONFIG_USB_AMD5536UDC=m
CONFIG_USB_NET2272=m
# CONFIG_USB_NET2272_DMA is not set
@@ -7540,6 +7568,7 @@ CONFIG_MMC_BLOCK=m
CONFIG_MMC_BLOCK_MINORS=8
CONFIG_SDIO_UART=m
CONFIG_MMC_TEST=m
+CONFIG_MMC_CRYPTO=y
#
# MMC/SD/SDIO Host Controller Drivers
@@ -7675,6 +7704,12 @@ CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=m
CONFIG_LEDS_TRIGGER_PATTERN=m
CONFIG_LEDS_TRIGGER_AUDIO=m
+CONFIG_LEDS_TRIGGER_TTY=m
+
+#
+# LED Blink
+#
+CONFIG_LEDS_BLINK=y
CONFIG_ACCESSIBILITY=y
CONFIG_A11Y_BRAILLE_CONSOLE=y
@@ -7704,7 +7739,6 @@ CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_DECODE_MCE=m
CONFIG_EDAC_GHES=y
CONFIG_EDAC_AMD64=m
-# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set
CONFIG_EDAC_E752X=m
CONFIG_EDAC_I82975X=m
CONFIG_EDAC_I3000=m
@@ -7846,7 +7880,6 @@ CONFIG_RTC_DRV_V3020=m
CONFIG_RTC_DRV_WM831X=m
CONFIG_RTC_DRV_WM8350=m
CONFIG_RTC_DRV_PCF50633=m
-CONFIG_RTC_DRV_AB3100=m
CONFIG_RTC_DRV_CROS_EC=m
#
@@ -7887,6 +7920,7 @@ CONFIG_DW_EDMA=m
CONFIG_DW_EDMA_PCIE=m
CONFIG_HSU_DMA=y
CONFIG_SF_PDMA=m
+CONFIG_INTEL_LDMA=y
#
# DMA Clients
@@ -7902,6 +7936,7 @@ CONFIG_SYNC_FILE=y
# CONFIG_SW_SYNC is not set
CONFIG_UDMABUF=y
# CONFIG_DMABUF_MOVE_NOTIFY is not set
+# CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
@@ -7954,7 +7989,9 @@ CONFIG_IRQ_BYPASS_MANAGER=m
CONFIG_VIRT_DRIVERS=y
CONFIG_VBOXGUEST=m
CONFIG_NITRO_ENCLAVES=m
+CONFIG_ACRN_HSM=m
CONFIG_VIRTIO=y
+CONFIG_VIRTIO_PCI_LIB=m
CONFIG_VIRTIO_MENU=y
CONFIG_VIRTIO_PCI=m
CONFIG_VIRTIO_PCI_LEGACY=y
@@ -8031,7 +8068,6 @@ CONFIG_XEN_UNPOPULATED_ALLOC=y
CONFIG_X86_PLATFORM_DEVICES=y
CONFIG_ACPI_WMI=m
CONFIG_WMI_BMOF=m
-CONFIG_ALIENWARE_WMI=m
CONFIG_HUAWEI_WMI=m
CONFIG_INTEL_WMI_SBL_FW_UPDATE=m
CONFIG_INTEL_WMI_THUNDERBOLT=m
@@ -8049,19 +8085,21 @@ CONFIG_ASUS_WMI=m
CONFIG_ASUS_NB_WMI=m
CONFIG_EEEPC_LAPTOP=m
CONFIG_EEEPC_WMI=m
+CONFIG_X86_PLATFORM_DRIVERS_DELL=y
+CONFIG_ALIENWARE_WMI=m
CONFIG_DCDBAS=m
+CONFIG_DELL_LAPTOP=m
+# CONFIG_DELL_RBU is not set
+CONFIG_DELL_RBTN=m
CONFIG_DELL_SMBIOS=m
CONFIG_DELL_SMBIOS_WMI=y
CONFIG_DELL_SMBIOS_SMM=y
-CONFIG_DELL_LAPTOP=m
-CONFIG_DELL_RBTN=m
-# CONFIG_DELL_RBU is not set
CONFIG_DELL_SMO8800=m
CONFIG_DELL_WMI=m
-CONFIG_DELL_WMI_SYSMAN=m
-CONFIG_DELL_WMI_DESCRIPTOR=m
CONFIG_DELL_WMI_AIO=m
+CONFIG_DELL_WMI_DESCRIPTOR=m
CONFIG_DELL_WMI_LED=m
+CONFIG_DELL_WMI_SYSMAN=m
CONFIG_AMILO_RFKILL=m
CONFIG_FUJITSU_LAPTOP=m
CONFIG_FUJITSU_TABLET=m
@@ -8120,8 +8158,6 @@ CONFIG_INTEL_TURBO_MAX_3=y
CONFIG_INTEL_UNCORE_FREQ_CONTROL=m
CONFIG_INTEL_BXTWC_PMIC_TMU=m
CONFIG_INTEL_CHTDC_TI_PWRBTN=m
-CONFIG_INTEL_MFLD_THERMAL=m
-CONFIG_INTEL_MID_POWER_BUTTON=m
CONFIG_INTEL_MRFLD_PWRBTN=m
CONFIG_INTEL_PMC_CORE=y
CONFIG_INTEL_PMT_CLASS=m
@@ -8165,8 +8201,14 @@ CONFIG_SURFACE_PLATFORMS=y
CONFIG_SURFACE3_WMI=m
CONFIG_SURFACE_3_BUTTON=m
CONFIG_SURFACE_3_POWER_OPREGION=m
+CONFIG_SURFACE_ACPI_NOTIFY=m
+CONFIG_SURFACE_AGGREGATOR_CDEV=m
CONFIG_SURFACE_GPE=m
+CONFIG_SURFACE_HOTPLUG=m
CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_SURFACE_AGGREGATOR=m
+CONFIG_SURFACE_AGGREGATOR_BUS=y
+# CONFIG_SURFACE_AGGREGATOR_ERROR_INJECTION is not set
CONFIG_HAVE_CLK=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
@@ -8182,6 +8224,7 @@ CONFIG_COMMON_CLK_S2MPS11=m
CONFIG_CLK_TWL6040=m
CONFIG_COMMON_CLK_PALMAS=m
CONFIG_COMMON_CLK_PWM=m
+CONFIG_XILINX_VCU=m
CONFIG_HWSPINLOCK=y
#
@@ -8203,6 +8246,7 @@ CONFIG_IOMMU_SUPPORT=y
#
# Generic IOMMU Pagetable Support
#
+CONFIG_IOMMU_IO_PGTABLE=y
# end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set
@@ -8287,7 +8331,6 @@ CONFIG_SOC_TI=y
#
# Xilinx SoC drivers
#
-CONFIG_XILINX_VCU=m
# end of Xilinx SoC drivers
# end of SOC (System On Chip) specific Drivers
@@ -8332,6 +8375,7 @@ CONFIG_EXTCON_USB_GPIO=m
CONFIG_EXTCON_USBC_CROS_EC=m
CONFIG_EXTCON_USBC_TUSB320=m
CONFIG_MEMORY=y
+CONFIG_FPGA_DFL_EMIF=m
CONFIG_IIO=m
CONFIG_IIO_BUFFER=y
CONFIG_IIO_BUFFER_CB=m
@@ -8537,6 +8581,7 @@ CONFIG_AD5755=m
CONFIG_AD5758=m
CONFIG_AD5761=m
CONFIG_AD5764=m
+CONFIG_AD5766=m
CONFIG_AD5770R=m
CONFIG_AD5791=m
CONFIG_AD7303=m
@@ -8737,6 +8782,7 @@ CONFIG_SENSORS_HMC5843_SPI=m
CONFIG_SENSORS_RM3100=m
CONFIG_SENSORS_RM3100_I2C=m
CONFIG_SENSORS_RM3100_SPI=m
+CONFIG_YAMAHA_YAS530=m
# end of Magnetometer sensors
#
@@ -8764,6 +8810,7 @@ CONFIG_IIO_SYSFS_TRIGGER=m
# Linear and angular position sensors
#
CONFIG_IQS624_POS=m
+CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# end of Linear and angular position sensors
#
@@ -8868,6 +8915,7 @@ CONFIG_NTB_MSI=y
CONFIG_NTB_AMD=m
CONFIG_NTB_IDT=m
CONFIG_NTB_INTEL=m
+CONFIG_NTB_EPF=m
CONFIG_NTB_SWITCHTEC=m
# CONFIG_NTB_PINGPONG is not set
# CONFIG_NTB_TOOL is not set
@@ -8923,6 +8971,8 @@ CONFIG_POWERCAP=y
CONFIG_INTEL_RAPL_CORE=m
CONFIG_INTEL_RAPL=m
CONFIG_IDLE_INJECT=y
+CONFIG_DTPM=y
+CONFIG_DTPM_CPU=y
CONFIG_MCB=m
CONFIG_MCB_PCI=m
CONFIG_MCB_LPC=m
@@ -8965,6 +9015,7 @@ CONFIG_DEV_DAX_PMEM_COMPAT=m
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
CONFIG_RAVE_SP_EEPROM=m
+CONFIG_NVMEM_RMEM=m
#
# HW tracing support
@@ -9002,6 +9053,7 @@ CONFIG_FPGA_DFL_FME_MGR=m
CONFIG_FPGA_DFL_FME_BRIDGE=m
CONFIG_FPGA_DFL_FME_REGION=m
CONFIG_FPGA_DFL_AFU=m
+CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000=m
CONFIG_FPGA_DFL_PCI=m
# CONFIG_TEE is not set
@@ -9314,6 +9366,7 @@ CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=m
CONFIG_NFS_COMMON=y
+CONFIG_NFS_V4_2_SSC_HELPER=m
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
CONFIG_SUNRPC_BACKCHANNEL=y
@@ -9528,7 +9581,6 @@ CONFIG_CRYPTO_CRYPTD=m
CONFIG_CRYPTO_AUTHENC=m
CONFIG_CRYPTO_TEST=m
CONFIG_CRYPTO_SIMD=m
-CONFIG_CRYPTO_GLUE_HELPER_X86=m
CONFIG_CRYPTO_ENGINE=m
#
@@ -9600,10 +9652,7 @@ CONFIG_CRYPTO_POLY1305_X86_64=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_RMD128=m
CONFIG_CRYPTO_RMD160=m
-CONFIG_CRYPTO_RMD256=m
-CONFIG_CRYPTO_RMD320=m
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA1_SSSE3=m
CONFIG_CRYPTO_SHA256_SSSE3=m
@@ -9613,7 +9662,6 @@ CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_SM3=m
CONFIG_CRYPTO_STREEBOG=m
-CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m
@@ -9638,7 +9686,6 @@ CONFIG_CRYPTO_CAST6_AVX_X86_64=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_DES3_EDE_X86_64=m
CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_SALSA20=m
CONFIG_CRYPTO_CHACHA20=m
CONFIG_CRYPTO_CHACHA20_X86_64=m
CONFIG_CRYPTO_SERPENT=m
@@ -9801,7 +9848,7 @@ CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_COMPRESS=y
-CONFIG_LZ4HC_COMPRESS=m
+CONFIG_LZ4HC_COMPRESS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
@@ -9825,6 +9872,7 @@ CONFIG_GENERIC_ALLOCATOR=y
CONFIG_REED_SOLOMON=m
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_BCH=m
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_TEXTSEARCH_BM=m
@@ -9998,6 +10046,12 @@ CONFIG_HAVE_ARCH_KASAN_VMALLOC=y
CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
# CONFIG_KASAN is not set
+CONFIG_HAVE_ARCH_KFENCE=y
+CONFIG_KFENCE=y
+CONFIG_KFENCE_STATIC_KEYS=y
+CONFIG_KFENCE_SAMPLE_INTERVAL=100
+CONFIG_KFENCE_NUM_OBJECTS=255
+CONFIG_KFENCE_STRESS_TEST_FAULTS=0
# end of Memory Debugging
CONFIG_DEBUG_SHIRQ=y
@@ -10056,6 +10110,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
# end of Lock Debugging (spinlocks, mutexes, etc...)
+# CONFIG_DEBUG_IRQFLAGS is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
# CONFIG_DEBUG_KOBJECT is not set
@@ -10099,13 +10154,13 @@ CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_FENTRY=y
+CONFIG_HAVE_OBJTOOL_MCOUNT=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACER_MAX_TRACE=y
CONFIG_TRACE_CLOCK=y
CONFIG_RING_BUFFER=y
CONFIG_EVENT_TRACING=y
CONFIG_CONTEXT_SWITCH_TRACER=y
-CONFIG_RING_BUFFER_ALLOW_SWAP=y
CONFIG_TRACING=y
CONFIG_GENERIC_TRACER=y
CONFIG_TRACING_SUPPORT=y
@@ -10137,6 +10192,7 @@ CONFIG_DYNAMIC_EVENTS=y
CONFIG_PROBE_EVENTS=y
# CONFIG_BPF_KPROBE_OVERRIDE is not set
CONFIG_FTRACE_MCOUNT_RECORD=y
+CONFIG_FTRACE_MCOUNT_USE_CC=y
CONFIG_TRACING_MAP=y
CONFIG_SYNTH_EVENTS=y
CONFIG_HIST_TRIGGERS=y
@@ -10208,12 +10264,12 @@ CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_REED_SOLOMON_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
-CONFIG_ATOMIC64_SELFTEST=y
+# CONFIG_ATOMIC64_SELFTEST is not set
CONFIG_ASYNC_RAID6_TEST=m
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_STRSCPY is not set
-CONFIG_TEST_KSTRTOX=y
+# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
generated by cgit v1.2.1 (git 2.18.0) at 2024-05-15 10:29:41 +0000